SN10KHT5574 OCTAL ECLĆTOĆTTL TRANSLATOR WITH DĆTYPE EDGEĆTRIGGERED FLIPĆFLOPS AND 3ĆSTATE OUTPUTS SDZS010 − JANUARY 1990 − REVISED OCTOBER 1990 • 10KH Compatible DW OR NT PACKAGE (TOP VIEW) • ECL Clock and TTL Control Inputs • Flow-Through Architecture Optimizes PCB Layout • Center Pin VCC, VEE, and GND Configurations Minimize High-Speed Switching Noise • Package Options Include “Small Outline” Packages and Standard Plastic DIPs 1Q 2Q 3Q 4Q VCC GND GND GND 5Q 1 2 3 4 5 6 7 8 9 24 1D 23 2D 22 3D 21 4D 20 OE(TTL) 19 VEE 18 GND 17 CLK(ECL) 16 5D description 6Q 10 7Q 11 15 6D 14 7D This octal ECL-to-TTL translator is designed to 8Q 12 13 8D provide efficient translation between a 10...

Since 2006. D4U Semicon,
Electronic Components Datasheet Search Site. (Privacy Policy & Contact)