Data sheet acquired from Harris Semiconductor SCHS124D January 1998 - Revised September 2003 CD54HC74, CD74HC74, CD54HCT74, CD74HCT74 Dual D Flip-Flop with Set and Reset Positive-Edge Trigger [ /Title (CD54H C74, CD74H C74, CD74H CT74) /Subject (Dual D FlipFlop with Set Features Description • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times • Asynchronous Set and Reset • Complementary Outputs • Buffered Inputs • TTAyp=ic2a5lofCMAX = 50MHz at VCC = 5V, CL = 15pF, • Fanout (Over Temperature Range) - Standard Outputs .
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10 LSTTL Loads - Bus Driver Outputs .
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15 LSTTL Loads • Wide Operating Tempe...

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