74AHC74; 74AHCT74
Dual D-type flip-flop with set and reset; positive-edge trigger
Rev.
8 — 22 April 2020
Product data sheet
1.
General description
The 74AHC74; 74AHCT74 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power
Schottky TTL (LSTTL).
It is specified in compliance with JEDEC standard No.
7-A.
The 74AHC74; 74AHCT74 is a dual positive-edge triggered, D-type flip-flop with individual data inputs (D), clock inputs (CP), set inputs (SD) and reset inputs (RD).
It also has complementary outputs (Q and Q).
The set and reset are asynchronous active LOW inputs that operate independent of the clock input.
Information on the data input is transferred to the Q output on t...