= Preliminary Technical Data FEATURES 2.
5V Stereo Audio Codec with 3.
3 V Tolerant Digital Interface Supports 96 kHz Sample Rates Supports 16/18 /20/24-Bit Word Lengths Multibit Sigma Delta Modulators with “Perfect Differential Linearity Restoration” for Reduced Idle Tones and Noise Floor Data Directed Scrambling DACs - Least Sensitive to Jitter Performance (20 Hz to 20 kHz) 90 dB ADC and DAC SNR Digitally Programmable Input/Output Gain On-chip Volume Controls Per Output Channel Hardware and Software Controllable Clickless Mute Supports 256xFs, 512xFs and 768xFs Master Mode Clocks Master Clock Pre-Scaler for use with DSP master clocks Flexible Serial Data Port with Right-Justified, LeftJustif...

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