TL16C554A, TL16C554AI ASYNCHRONOUS-COMMUNICATIONS ELEMENT D Integrated Asynchronous-Communications Element D Consists of Four Improved TL16C550C ACEs Plus Steering Logic D In FIFO Mode, Each ACE Transmitter and Receiver Is Buffered With 16-Byte FIFO to Reduce the Number of Interrupts to CPU D In TL16C450 Mode, Hold and Shift Registers Eliminate Need for Precise Synchronization Between the CPU and Serial Data D Up to 16-MHz Clock Rate for up to 1-Mbaud Operation with VCC = 3.
3 V and 5 V D Programmable Baud-Rate Generators Which Allow Division of Any Input Reference Clock by 1 to (216 −1) and Generate an Internal 16 × Clock D Adds or Deletes Standard Asynchronous Communication Bits (Start, St...

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