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TPS51206
SLUSAH1E – MAY 2011 – REVISED JULY 2018
TPS51206 2-A Peak Sink / Source DDR Termination
Regulator With VTTREF Buffered Reference for DDR2, DDR3, DDR3L, and DDR4
1 Features
•1 Supply Input Voltage: Supports 3.
3-V Rail and 5-V Rail
• VLDOIN Input Voltage Range: VTT+0.
4 V to 3.
5 V • VTT Termination
Regulator
– Output Voltage Range: 0.
5 V to 0.
9 V – 2-A Peak Sink and Source Current – Requires Only 10-μF MLCC Output Capacitor – ±20 mV Accuracy • VTTREF Buffered Reference – VDDQ/2 ± 1% Accuracy – 10-mA Sink and Source Current • Supports High-Z in S3 and Soft-Stop in S4 and S5 with S3 and S5 Inputs • Ov...