| Part Number | ZL30166 |
| Manufacturer | Microsemi |
| Title | Triple Channel Network Synchronization Clock Translator |
| Description | 29 Figure 14 "Typical Power-Up Reset and Configuration Circuit" 30 5.1, “ZL30166 Configuration programming“ 204 13.0, “Package Markings“ Ch... |
| Features |
• Three programmable digital PLLs/Numerically Controlled Oscillators (NCOs) • Synchronize to any clock rate from 1 KHz to 750 MHz • Four programmable synthesizers generate any clock rate from 1 Hz to 750 MHz with low jitter for 10G PHYs • Flexible two-stage architecture translates between arbitrary ... |
| File Size | 733.66KB |
| Datasheet |
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ZL30160 : . . 11 3.0 Application Example . 15 4.0 Functional Description . . 16 4.1 Input Sources . 16 4.2 Input Reference Monitoring . . ..
ZL30161 : All device inputs and outputs are LVCMOS unless it is specifically stated to be differential. For the I/O column, there are digital inputs (I), digital outputs (O), analog inputs (A-I) and analog outputs (A-O). Ball # Name Input Reference M3 ref0_p M4 ref0_n L3 ref1_p L4 ref1_n M5 ref2_p M6 ref2_n L5 ref3_p L6 ref3_n M7 ref4_p M8 ref4_n L7 ref5_p L8 ref5_n M9 ref6_p L9 ref6_n M10 ref7_p M11 ref7_n L10 ref8_p L11 ref8_n M12 ref9 L12 ref10 Output Clocks D3 hpoutclk0 D4 hpoutclk1 D10 hpoutclk2 D9 hpoutclk3 F3 hpoutclk4 F4 hpoutclk5 A1 hpdiff0_p B1 hpdiff0_n C1 hpdiff1_p C2 hpdiff1_n A12 hpdiff2_p B12 hpdiff2_n C12 hpdiff3_p .
ZL30163 : 2 Microsemi Corporation ZL30163 Short Form Data Sheet 2.0 Pin Description All device inputs and outputs are LVCMOS unless it is specifically stated to be differential. For the I/O column, there are digital inputs (I), digital outputs (O), analog inputs (A-I) and analog outputs (A-O). Ball # Name Input Reference M3 ref0_p M4 ref0_n L3 ref1_p L4 ref1_n M5 ref2_p M6 ref2_n L5 ref3_p L6 ref3_n M7 ref4_p M8 ref4_n L7 ref5_p L8 ref5_n M9 ref6_p L9 ref6_n M10 ref7_p M11 ref7_n L10 ref8_p L11 ref8_n M12 ref9 L12 ref10 Output Clocks D3 hpoutclk0 D4 hpoutclk1 D10 hpoutclk2 D9 hpoutclk3 F3 hpoutclk4 F4 hpoutclk5 F9 hpoutclk6 F10 hpoutclk7 .
ZL30165 : 17 Precise Frequency Monitor (PFM) 18 Guard Soak Timer (GST) 31 Figure 14 "Typical Power-Up Reset and Configuration Circuit" 32 5.1, “ZL30165 Configuration programming“ 85 Register Name: phasemem_limit_ref0 118 Register Name: dpll0_df_offset 162 13.0, “Package Markings“ Change Included availability of customer defined default configurations Updated GPIO[5:6] power-up settings Clarified the PFM measurement interval Corrected the GST description Updated GPIO[5:6] power-up settings Added section 5.1 Corrected the 1ms phase memory limit example in the register description. Corrected the f_out equation in the register description. Added section 13.0 for package markings Below are t.
ZL30167 : 17 Precise Frequency Monitor (PFM) 18 Guard Soak Timer (GST) 31 Figure 14 "Typical Power-Up Reset and Configuration Circuit" 32 5.1, “ZL30167 Configuration programming“ 93 Register Name: phasemem_limit_ref0 130 Register Name: dpll0_df_offset 173 13.0, “Package Markings“ Change Included availability of customer defined default configurations Updated GPIO[5:6] power-up settings Clarified the PFM measurement interval Corrected the GST description Updated Figure 14 for GPIO5 and 6 at power-up Added section 5.1 Corrected the 1ms phase memory limit example in the register description. Corrected the f_out equation in the register description. Added section 13.0 for package markings 3.
ZL30168 : Precise Frequency Monitor (PFM) Guard Soak Timer (GST) Figure 14 "Typical Power-Up Reset and Configuration Circuit" 5.1, “ZL30168 Configuration programming“ Register Name: phasemem_limit_ref0 127 Register Name: dpll0_df_offset 187 13.0, “Package Markings“ Change Updated GPIO[5:6] power-up settings Clarified the PFM measurement interval Corrected the GST description Updated GPIO[5:6] power-up settings Added section 5.1 Corrected the 1ms phase memory limit example in the register description Corrected the f_out equation in the register description Added section 13.0 for package markings Below are the changes from the January 2014 issue to the February 2014 issue: Page 16 18 19 Item Preci.
ZL30169 : ... 8 5. FUNCTIONAL DESCRIPTION .... 10 5.1 DEVICE IDENTIFICATION .. 10 5.2 TOP-LEVEL CONFIGURATION . 10 5.2.1 APLL-Only Mode .... 10 5.2.2 DPLL+APLL Mod.