ADS5272

ADS5270 : The ADS5270 is a high-performance, 40MSPS, 8-channel, parallel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size. An integrated phase lock loop multiplies the incoming ADC sampling clock by a factor of 12. This 12x clock is used in the process of serializing the data output from each channel. The 12x clock is also used to generate a 1x and a 6x clock, both of which are transmitted as LVDS clock outputs. The 6x clock is denoted by the differential p.

ADS5270 : The ADS5270 is a high-performance, 40MSPS, 8-channel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size. MODEL ADS5271 ADS5272 ADS5273 ADS5277 RELATED PRODUCTS RESOLUTION (BITS) 12 12 12 10 SAMPLE RATE (MSPS) 50 65 70 65 CHANNELS 8 8 8 8 REFT V CM REFB CS SCLK SDATA RESET PD An integrated phase lock loop (PLL) multiplies the incoming ADC sampling clock by a factor of 12. This high-frequency LVDS clock is used in the data serialization and tra.

ADS5271 : The ADS5271 is a high-performance, 50MSPS, 8-channel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size. MODEL ADS5270 ADS5272 ADS5273 ADS5277 RELATED PRODUCTS RESOLUTION SAMPLE (BITS) RATE (MSPS) 12 40 12 65 12 70 10 65 CHANNELS 8 8 8 8 R EFT V CM REFB CS SCLK SDATA RESE T PD An integrated phase lock loop (PLL) multiplies the incoming ADC sampling clock by a factor of 12. This high-frequency LVDS clock is used in the data serializat.

ADS5271 : .

ADS5272 : The ADS5272 is a high-performance, 65MSPS, 8-channel, parallel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size. An integrated phase lock loop multiplies the incoming ADC sampling clock by a factor of 12. This 12x clock is used in the process of serializing the data output from each channel. The 12x clock is also used to generate a 1x and a 6x clock, both of which are transmitted as LVDS clock outputs. The 6x clock is denoted by the differential p.

ADS5273 : The ADS5273 is a high-performance, CMOS, 70MSPS, 8-channel analog-to-digital converter (ADC). An internal reference is provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size. MODEL ADS5270 ADS5271 ADS5272 ADS5277 RELATED PRODUCTS RESOLUTION (BITS) 12 12 12 10 SAMPLE RATE (MSPS) 40 50 65 65 CHANNELS 8 8 8 8 REFT V CM REFB CS SCLK SDATA RESET PD An integrated phase lock loop (PLL) multiplies the incoming ADC sampling clock by a factor of 12. This high-frequency LVDS clock is used in the data serialization .

ADS5273 : The ADS5273 is a high-performance, 70MSPS, 8-channel parallel analog-to-digital converter (ADC). An internal reference is provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS outputs reduce the number of interface lines and package size. In LVDS (low-voltage differential signaling), an integrated phase lock loop multiplies the incoming ADC sampling clock by a factor of 6. This high-frequency LVDS clock is used in the data serialization and transmission process and is converted to an LVDS signal for transmission in parallel with the data. Providing this additional LVDS clock allows for easy delay matching. .

ADS5277 : The ADS5277 is a high-performance, CMOS, 65MSPS, 8-channel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size. MODEL ADS5270 ADS5271 ADS5272 ADS5273 RELATED PRODUCTS RESOLUTION (BITS) 12 12 12 12 SAMPLE RATE (MSPS) 40 50 65 70 CHANNELS 8 8 8 8 REF T VCM REFB CS SCLK SDATA RESET PD An integrated phase lock loop (PLL) multiplies the incoming ADC sampling clock by a factor of 12. This high-frequency clock is used in the data serialization and tr.

ADS5277 : The ADS5277 is a high-performance, CMOS, 65MSPS, 8-channel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size. RELATED PRODUCTS MODEL ADS5270 ADS5271 ADS5272 ADS5273 RESOLUTION (BITS) 12 12 12 12 SAMPLE RATE (MSPS) 40 50 65 70 CHANNELS 8 8 8 8 IN2 P IN2N IN3 P IN3N IN4 P IN4N IN5 P IN5N IN6 P IN6N IN7 P IN7N IN8 P IN8N S/H 10−Bit ADC Serializer S/H 10−Bit ADC Serializer S/H 10−Bit ADC Serializer S/H 10−Bit ADC Serializer S/H 10−Bit AD.