s s s s s 32-Bit Parallel Architecture —Load/Store Architecture —Sixteen 32-Bit Global Registers —Sixteen 32-Bit Local Registers —1.28 Gbyte Internal Bandwidth (80 MHz) —On-Chip Register Cache Processor Core Clock —80960HA is 1x Bus Clock —80960HD...

Since 2006. D4U Semicon,
Electronic Components Datasheet Search Site. (Privacy Policy & Contact)