Part Number
|
CY7C1356BV25 |
Manufacturer
|
Cypress Semiconductor |
Description
|
256K x 36/512K x 18 Pipelined SRAM with NoBL Architecture |
Published
|
Mar 27, 2005 |
Detailed Description
|
CY7C1354BV25 CY7C1356BV25
256K x 36/512K x 18 Pipelined SRAM with NoBL™ Architecture
Features
• Pin-compatible and func...
|
Datasheet
|
CY7C1356BV25
|
Overview
CY7C1354BV25 CY7C1356BV25
256K x 36/512K x 18 Pipelined SRAM with NoBL™ Architecture
Features
• Pin-compatible and functionally equivalent to ZBT™ • Supports 225-MHz bus operations with zero wait states — Available speed grades are 225, 200 and 166 MHz • Internally self-timed output buffer control to eliminate the need to use asynchronous OE • Fully registered (inputs and outputs) for pipelined operation • Byte Write capability • Single 2.
5V power supply • Fast clock-to-output times — 2.
8 ns (for 225-MHz device) — 3.
2ns (for 200-MHz device) — 3.
5 ns (for 166-MHz device) • Clock Enable (CEN) pin to suspend operation • Synchronous self-timed writes • Available in 100 TQFP, 119 BGA, and 165 fB...
Similar Datasheet