FIN1002 LVDS 1-Bit High Speed Differential Receiver February 2002 Revised February 2002 FIN1002 LVDS 1-Bit High Speed Differential Receiver General Description This single receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology.
The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal levels.
LVDS provides low EMI at ultra low power dissipation even at high frequencies.
This device is ideal for high speed transfer of clock or data.
The FIN1002 can be paired with its companion driver, the FIN1001, or with any other LVDS driver.
Features s Greater than 400Mbs data rate s 3.
3V power su...

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