FIN1032 3.
3V LVDS 4-Bit High Speed Differential Receiver August 2001 Revised December 2001 FIN1032 3.
3V LVDS 4-Bit High Speed Differential Receiver General Description This quad receiver is designed for high speed interconnect utilizing Low Voltage Differential Signaling (LVDS) technology.
The receiver translates LVDS levels, with a typical differential input threshold of 100mV, to LVTTL signal levels.
LVDS provides low EMI at ultra low power dissipation even at high frequencies.
This device is ideal for high speed transfer of clock and data.
The FIN1032 can be paired with its companion driver, the FIN1031, or any other Fairchild LVDS driver.
Features s Greater than 400Mbs data rate s 3.
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