Part Number
|
74F113 |
Manufacturer
|
Fairchild Semiconductor |
Description
|
Dual JK Negative Edge-Triggered Flip-Flop |
Published
|
Apr 3, 2005 |
Detailed Description
|
74F113 Dual JK Negative Edge-Triggered Flip-Flop
April 1988 Revised July 1999
74F113 Dual JK Negative Edge-Triggered F...
|
Datasheet
|
74F113
|
Overview
74F113 Dual JK Negative Edge-Triggered Flip-Flop
April 1988 Revised July 1999
74F113 Dual JK Negative Edge-Triggered Flip-Flop
General Description
The 74F113 offers individual J, K, Set and Clock inputs.
When the clock goes HIGH the inputs are enabled and data may be entered.
The logic level of the J and K inputs may be changed when the clock pulse is HIGH and the flipflop will perform according to the Truth Table as long as minimum setup and hold times are observed.
Input data is transferred to the outputs on the falling edge of the clock pulse.
Asynchronous input: LOW input to SD sets Q to HIGH level Set is independent of clock
Ordering Code:
Order Number 74F113SC 74F113SJ 74F113PC Pack...
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