128K x 36, 3.
3V Synchronous IDT71V546 SRAM with ZBT™ Feature, Burst Counter and Pipelined Outputs Features 128K x 36 memory configuration, pipelined outputs Supports high performance system speed - 133 MHz (4.
2 ns Clock-to-Data Access) ZBTTM Feature - No dead cycles between write and read cycles Internally synchronized registered outputs eliminate the need to control OE Single R/W (READ/WRITE) control pin Positive clock-edge triggered address, data, and control signal registers for fully pipelined applications 4-word burst capability (interleaved or linear) Individual byte write (BW1 - BW4) control (May tie active) Three chip enables for simple depth expansion Single 3.
3V power supply (±5%) ...

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