1Mx36 & 2Mx18 DDRII CIO b2 SRAM
K7D803671B K7D801871B Document Title 8M DDR SYNCHRONOUS SRAM 256Kx36 & 512Kx18 SRAM Revision History Rev No. Rev. 0.0 Rev. 0.1 Rev. 0.2 History -Initial document. -ZQ tolerance changed from 10% to 15% -Stop Clock Standby Current condition changed from VIN=VDD-0.2V or 0.2V fixed to V IN =VIH or V IH -VDDQ Max. changed to 2.0V SA0, SA1 defined for Boundary S...
Samsung semiconductor