DatasheetsPDF.com

SL74HC112

Dual J-K Flip-Flop with Set and Reset

Description

SL74HC112 Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS The SL74HC112 is identical in pinout to the LS/ALS112. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. Each flip-flop is negative-edge clocked and has active-low asynchronous Set and Reset inputs....

System Logic Semiconductor

View SL74HC112 Datasheet

Similar Datasheet

SL74HC10 Triple 3-Input NAND Gate - System Logic Semiconductor
SL74HC109 Dual J-K Flip-Flop with Set and Reset - System Logic Semiconductor
SL74HC11 Triple 3-Input AND Gate - System Logic Semiconductor
SL74HC112 Dual J-K Flip-Flop with Set and Reset - System Logic Semiconductor
SL74HC123 Dual Retriggerable Monostable Multivibrator - System Logic Semiconductor
SL74HC125 Quad 3-State Noninverting Buffers - System Logic Semiconductor
SL74HC132 Quad 2-Input NAND Gate - System Logic Semiconductor
SL74HC138 1-of-8 Decoder/Demultiplexer - System Logic Semiconductor
SL74HC139 Dual 1-of-4 Decoder/Demultiplexer - System Logic Semiconductor
SL74HC14 Hex Schmitt-Trigger Inverter - System Logic Semiconductor

@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)