PRELIMINARY DATA SHEET
NPN SILICON EPITAXIAL TWIN
TRANSISTOR
UPA836TC
FEATURES
• SMALL PACKAGE OUTLINE: 1.
5 mm x 1.
1 mm, 33% smaller than conventional SOT-363 package LOW HEIGHT PROFILE: Just 0.
55 mm high FLAT LEAD STYLE: Reduced lead inductance improves electrical performance TWO DIFFERENT DIE TYPES: Q1 - Ideal oscillator
transistor Q2 - Ideal buffer amplifier
transistor
OUTLINE DIMENSIONS
(Units in mm)
Package Outline TC (TOP VIEW)
1.
50±0.
1 1.
10±0.
1
• •
0.
20 +0.
1
-0.
05
1 1.
50±0.
1 0.
96 0.
48 3 0.
48 2
6
•
5
4
PIN OUT 1.
Collector (Q1) 2.
Emitter (Q1) 3.
Collector (Q2) 4.
Base (Q2) 5.
Emitter (Q2) 6.
Base (Q1)
DESCRIPTION
The UPA836TC contains one NE685 and one NE688
NPN high f...