Preliminary Data Sheet July 2001 LCK4801 Low-Voltage HSTL Differential Clock General The LCK4801 is a low-voltage, 3.
3 V HSTL differential clock synthesizer.
The LCK4801 supports two differential HSTL output pairs with frequencies from 336 MHz to 1 GHz.
The clock is designed to support single and multiple processor systems that require HSTL differential inputs.
The LCK4801 contains a fully integrated PLL (phase-locked loop) which multiplies the HSTL_CLK or PECL_CLK input frequency to match individual processor clock frequencies.
The PLL can be bypassed so that the PCLK outputs are fed from the HSTL_CLK or PECL_CLK input for test purposes.
All outputs are powered from a 2 V external supply t...

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