MC100H642

MC100H640 : The MC10H/100H640 generates the necessary clocks for the 68030, 68040 and similar microprocessors. It is guaranteed to meet the clock specifications required by the 68030 and 68040 in terms of part−to−part skew, within−part skew and also duty cycle skew. The user has a choice of using either TTL or PECL (ECL referenced to +5.0 V) for the input clock. TTL clocks are typically used in present MPU systems. However, as clock speeds increase to 50 MHz and beyond, the inherent superiority of ECL (particularly differential ECL) as a means of clock signal distribution becomes increasingly evident. The H640 also uses differential PECL internally to achieve its superior skew characteristic. The H640 .

MC100H640 : www.DataSheet4U.com MOTOROLA SEMICONDUCTOR TECHNICAL DATA 68030/040 PECL-TTL Clock Driver The MC10H/100H640 generates the necessary clocks for the 68030, 68040 and similar microprocessors. It is guaranteed to meet the clock specifications required by the 68030 and 68040 in terms of part–to–part skew, within–part skew and also duty cycle skew. The user has a choice of using either TTL or PECL (ECL referenced to +5.0V) for the input clock. TTL clocks are typically used in present MPU systems. However, as clock speeds increase to 50MHz and beyond, the inherent superiority of ECL (particularly differential ECL) as a means of clock signal distribution becomes increasingly evident. The H640 als.

MC100H641 : The MC10H/100H641 is a single supply, low skew translating 1:9 clock driver. Devices in the ON Semiconductor H641 translator series utilize the PLCC−28 for optimal power pinning, signal flow through and electrical performance. The device features a 24 mA TTL output stage, with AC performance specified into a 50 pF load capacitance. A latch is provided on−chip. When LEN is LOW (or left open, in which case it is pulled LOW by the internal pulldown) the latch is transparent. A HIGH on the enable pin (EN) forces all outputs LOW. Both the LEN and EN pins are positive ECL inputs. The VBB output is provided in case the user wants to drive the device with a single−ended input. For single−ended use,.

MC100H641 : MOTOROLA SEMICONDUCTOR TECHNICAL DATA Single Supply PECL-TTL 1:9 Clock Distribution Chip MC10H641 MC100H641 The MC10H/100H641 is a single supply, low skew translating 1:9 clock driver. Devices in the Motorola H600 translator series utilize the 28–lead PLCC for optimal power pinning, signal flow through and electrical performance. The device features a 24mA TTL output stage, with AC performance specified into a 50pF load capacitance. A latch is provided on–chip. When LEN is LOW (or left open, in which case it is pulled LOW by the internal pulldown) the latch is transparent. A HIGH on the enable pin (EN) forces all outputs LOW. Both the LEN and EN pins are positive ECL inputs. The VBB outpu.

MC100H642 : MOTOROLA SEMICONDUCTOR TECHNICAL DATA 68030/040 PECL-TTL Clock Driver The MC10H/100H642 generates the necessary clocks for the 68030, 68040 and similar microprocessors. It is guaranteed to meet the clock specifications required by the 68030 and 68040 in terms of part–to–part skew, within–part skew and also duty cycle skew. The user has a choice of using either TTL or PECL (ECL referenced to +5.0V) for the input clock. TTL clocks are typically used in present MPU systems. However, as clock speeds increase to 50MHz and beyond, the inherent superiority of ECL (particularly differential ECL) as a means of clock signal distribution becomes increasingly evident. The H642 also uses differential PE.

MC100H643 : The MC10H/100H643 is a dual supply, low skew translating 1:8 clock driver. Devices in the ON Semiconductor H643 translator series utilize the PLCC−28 for optimal power pinning, signal flow through and electrical performance. The dual−supply H643 is similar to the H641, which is a single−supply 1:9 version of the same function. The device features a 48 mA TTL output stage, with AC performance specified into a 50 pF load capacitance. A Latch is provided on−chip. When LEN is LOW (or left open, in which case it is pulled LOW by the internal pulldowns) the latch is transparent. A HIGH on the enable pin (EN) forces all outputs LOW. The 10H version is compatible with MECL 10H™ ECL logic levels. Th.

MC100H643 : .

MC100H644 : PIN GT VT VE GE DE, DE VBB DT Qn, Qn SEL R FUNCTION TTL Ground (0 V) TTL VCC (+5.0 V) ECL VCC (+5.0 V) ECL Ground (0 V) ECL Signal Input (positive ECL) VBB Reference Output TTL Signal Input Signal Outputs (TTL) Input Select (TTL) Reset (TTL) *Skews are specified for Identical Edges Figure 1. Pinout: PLCC−20 (Top View) TTL OUTPUTS VBB DE (ECL) DE (ECL) 2:1 MUX ÷2 Q1 Q0 DT (TTL) Q2 SEL (TTL) ÷4 Q3 Q4 R (TTL) Q5 Figure 2. Logic Diagram http://onsemi.com 2 MC10H644, MC100H644 Table 2. 10H PECL DC CHARACTERISTICS (VT = VE = 5.0 V ±5%) 0°C Symbol IINH IINL VIH* VIL* VBB* Characteristic Input HIGH Current Input LOW Current Input HIGH Voltage Input LOW Voltage Output Reference Voltage VE.

MC100H644 : MOTOROLA SEMICONDUCTOR TECHNICAL DATA 68030/040 PECL-TTL Clock Driver MC10H644 MC100H644 The MC10H/100H644 generates the necessary clocks for the 68030, 68040 and similar microprocessors. The device is functionally equivalent to the H640, but with fewer outputs in a smaller outline 20–lead PLCC package. It is guaranteed to meet the clock specifications required by the 68030 and 68040 in terms of part–to–part skew, within–part skew and also duty cycle skew. 68030/040 PECL–TTL CLOCK DRIVER • Generates Clocks for 68030/040 • Meets 68030/040 Skew Requirements • TTL or PECL Input Clock • Extra TTL and ECL Power/Ground Pins • Within Device Skew on Similar Paths is 0.5 ns • Asynchronous Reset .

MC100H646 : The MC10H/100H646 is a single supply, low skew translating 1:8 clock driver. Devices in the ON Semiconductor H646 translator series utilize the 28−lead PLCC for optimal power pinning, signal flow through and electrical performance. The single supply H646 is similar to the H643, which is a dual supply 1:8 version of the same function. The H646 was designed specifically to drive series terminated transmission lines. Special techniques were used to match the HIGH and LOW output impedances to about 7.0 W. This simplifies the choice of the termination resistor for series terminated applications. To match the HIGH and LOW output impedances, it was necessary to remove the standard IOS limiting res.

MC100H646 : MOTOROLA SEMICONDUCTOR TECHNICAL DATA PECL/TTL-TTL 1:8 Clock Distribution Chip MC10H646 MC100H646 The MC10H/100H646 is a single supply, low skew translating 1:8 clock driver. Devices in the Motorola H600 translator series utilize the 28–lead PLCC for optimal power pinning, signal flow through and electrical performance. The single supply H646 is similar to the H643, which is a dual supply 1:8 version of the same function. • PECL/TTL–TTL Version of Popular ECLinPS™ E111 • Low Skew • Guaranteed Skew Spec • Tri–State Enable • Differential Internal Design • VBB Output • Single Supply • Extra TTL and ECL Power/Ground Pins • Matched High and Low Output Impedance • Meets Specifications Required .