2001.
July Rev.
0.
1 MITSUBISHI LSIs Advanced Information Notice: This is not final specification.
Some parametric limits are subject to change.
M5M5V5636GP –16 18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM DESCRIPTION The M5M5V5636GP is a family of 18M bit synchronous SRAMs organized as 524288-words by 36-bit.
It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads.
Mitsubishi's SRAMs are fabricated with high performance, low power CMOS technology, providing greater reliability.
M5M5V5636GP operates on 3.
3V power/ 2.
5V I/O supply or a single 3.
3V power supply and are 3.
3V CMOS compatible.
APPLICATION High-end networking prod...

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