19-2216; Rev 0; 10/01 Low-Jitter, Low-Noise LVPECL-to-LVDS Level Translator in an SC70 Package General Description The MAX9156 is an LVPECL-to-LVDS level translator that accepts a single LVPECL input and translates it to a single LVDS output.
It is ideal for interfacing between LVPECL and LVDS interfaces in systems that require minimum jitter, noise, power, and space.
Ultra-low, 23ps p-p added deterministic jitter and 0.
6psRMS added random jitter ensure reliable communication in high-speed links that are highly sensitive to timing errors, especially those incorporating clock-anddata recovery, PLLs, serializers, or deserializers.
The MAX9156’s switching performance guarantees a 200Mbps data ...

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