September 2003, ver.
4.
5 Includes ® MAX 7000AE MAX 7000A Programmable Logic Device Data Sheet Features.
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.
f ■ High-performance 3.
3-V EEPROM-based programmable logic devices (PLDs) built on second-generation Multiple Array MatriX (MAX®) architecture (see Table 1) ■ 3.
3-V in-system programmability (ISP) through the built-in IEEE Std.
1149.
1 Joint Test Action Group (JTAG) interface with advanced pin-locking capability – MAX 7000AE device in-system programmability (ISP) circuitry compliant with IEEE Std.
1532 – EPM7128A and EPM7256A device ISP circuitry compatible with IEEE Std.
1532 ■ Built-in boundary-scan test (BST) circuitry compliant with IEEE Std.
1149.
1 ■ Supports JEDEC Jam Standard T...

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