Part Number
|
M2S56D30TP-10 |
Manufacturer
|
Mitsubishi |
Description
|
256M Double Data Rate Synchronous DRAM |
Published
|
May 2, 2005 |
Detailed Description
|
DDR SDRAM (Rev.0.0) Sep.'99 Preliminary
MITSUBISHI LSIs
M2S56D20/ 30 TP
256M Double Data Rate Synchronous DRAM
PRELIM...
|
Datasheet
|
M2S56D30TP-10
|
Overview
DDR SDRAM (Rev.
0.
0) Sep.
'99 Preliminary
MITSUBISHI LSIs
M2S56D20/ 30 TP
256M Double Data Rate Synchronous DRAM
PRELIMINARY
Some of contents are subject to change without notice.
DESCRIPTION
M2S56D20TP is a 4-bank x 16777216-word x 4-bit, M2S56D30TP is a 4-bank x 8388608-word x 8-bit, double data rate synchronous DRAM, with SSTL_2 interface.
All control and address signals are referenced to the rising edge of CLK.
Input data is registered on both edges of data strobe, and output data and data strobe are referenced on both edges of CLK.
The M2S56D20/30 TP achieves very high speed data rate up to 133MHz, and are suitable for main memory in computer systems.
FEATURES
- Vdd=Vddq=2.
5v±0.
2V - ...
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