PRELIMINARY INFORMATION MK74ZD133 PLL and 32-Output Clock Driver Features • 56 pin SSOP or 64 pin LQFP package • On-chip PLL generates output clocks up to 80 MHz (SSOP) or 133.
33 MHz (LQFP) • Zero delay plus multiplier function • 32 low-skew outputs can eliminate chip-to-chip skew concerns in systems with less than 33 clocks • Output to output skew of 200 ps (with stagger) • Device to device skew of 700ps • Staggered, fixed skew helps reduce EMI • Tri-state (Output Enable) pin • Output blocks can be independently powered off • 250 ps typical fixed delay between input and output in “Multiplier” mode • Ideal for Fast Ethernet and Gigabit Ethernet designs • Good for video servers • 3.
3V±5% sup...

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