MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MMDF2N06VL/D Product Preview TMOS V™ SO-8 for Surface Mount N–Channel Enhancement–Mode Silicon Gate TMOS V is a new technology designed to achieve an on–resistance area product about one–half that of standard MOSFETs.
This new technology more than doubles the present cell density of our 50 and 60 volt TMOS devices.
Just as with our TMOS E–FET designs, TMOS V is designed to withstand high energy in the avalanche and commutation modes.
Designed for low voltage, high speed switching applications in power supplies, converters and power motor controls, these devices are particularly well suited for bridge circuits where diode speed ...

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