S DG 8204
S amHop Microelectronics C orp.
December , 2002
Dual N-C hannel E nhancement Mode Field E ffect
Transistor
P R ODUC T S UMMAR Y
V DS S
20V
F E AT UR E S
( m W ) Max
ID
6A
R DS (ON)
S uper high dense cell design for low R DS (ON ).
28 @ V G S = 4.
0V 34 @ V G S = 2.
5V
R ugged and reliable.
S urface Mount P ackage.
D2
8
S2
7
S2
6
G2
5
T S S OP
1
(T OP V IE W)
1 2 3 4
D1
S1
S1
G1
ABS OLUTE MAXIMUM R ATINGS (T A=25 C unless otherwise noted)
P arameter Drain-S ource Voltage Gate-S ource Voltage Drain C urrent-C ontinuous a @ T J =125 C b -P ulsed (300us Pulse Width) Drain-S ource Diode Forward C urrent a Maximum P ower Dissipation a Operating Junction and S torage Tempe...