S DM4952
S amHop Microelectronics C orp.
March , 2003
Dual P -C hannel E nhancement Mode Field E ffect
Transistor
P R ODUC T S UMMAR Y
V DS S
-20V
F E AT UR E S
( m W ) MAX
ID
-5.
3A
R DS (ON)
S uper high dense cell design for low R DS (ON ).
50 @ V G S = -4.
5V 75 @ V G S = -2.
7V
R ugged and reliable.
S urface Mount P ackage.
D1
8
D1
7
D2
6
D2
5
S O-8 1
1 2 3 4
S1
G1
S2
G2
ABS OLUTE MAXIMUM R ATINGS (T A=25 C unless otherwise noted)
P arameter Drain-S ource Voltage Gate-S ource Voltage Drain C urrent-C ontinuous a @ T J =125 C b -P ulsed (300us Pulse Width) Drain-S ource Diode Forward C urrent a Maximum P ower Dissipation a Operating Junction and S torage Temperature R ange S...