ST10R167 16-BIT ROMLESS MCU s HIGH PERFORMANCE CPU – 16-BIT CPU WITH 4-STAGE PIPELINE – 80ns INSTRUCTION CYCLE TIME @ 25MHz CLK – 400ns 16 X 16-BIT MULTIPLICATION – 800ns 32 / 16-BIT DIVISION – ENHANCE D BOOLEAN BIT MANIPULATION FACILITIES – ADDITIONAL INSTRUCTIONS TO SUPPOR T HLL AND OPERATING SYSTEMS – SINGLE-CYCL E CONT EXT SWITCHING SUPPORT MEMORY ORGANIZATION – UP TO 16M BYTE LINEAR ADDRESS SPACE FOR CODE AND DATA (5M BYTE WITH CAN) – 2K BYTE ON-CHIP INTERNAL RAM (IRAM) – 2K BYTE ON-CHIP EXTENSION RAM (XRAM) FAST AND FLEXIBLE BUS – PROGRAMMABLE EXTERNAL BUS CHARA CTERISTICS FOR DIFFERENT ADDRESS RANGES – 8-BIT OR 16-BIT EXTERNAL DATA BUS – MULTIPLEXED OR DEMULTIPLEXED EXTERNAL ADDRE SS/...

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