w w at .
D w h S a ee U 4 t mAgilent HPFC-5000 Tachyon o .
c Fibre Channel Interface Controller Product Brief Internal Block Diagram The Internal Block Diagram in Figure 1 below shows the high-level chip architecture for Tachyon.
Inbound Message Queue Inbound Data MFS SFS Buffer Buffer Queue Queue Outbound Host-Based Data Structures Command Queue SCSI Exchange State Table High-Priority Command Queue Backplane Interface Inbound Block Mover Inbound Message Channel Inbound SFS and MFS Buffer Channels SCSI Read/Write Channel Inbound Data Manager Inbound Data FIFO Receive w Inbound Sequence Manager w .
D w SCSI Buffer Manager ACKs ACKs Loop/N_Port State Machine FCP Assists SCSI Excha...

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