March 2004 AS7C513B ® 5V 32K×16 CMOS SRAM Features • Industrial and commercial temperature • Organization: 32,768 words × 16 bits • Center power and ground pins • High speed • 10/12/15/20 ns address access time • 5, 6, 7, 8 ns output enable access time • Low power consumption: ACTIVE • 605mW / max @ 10 ns • Low power consumption: STANDBY • 55 mW / max CMOS I/O • 6T 0.
18u CMOS Technology • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • 44-pin JEDEC standard package • 400 mil SOJ • 400 mil TSOP 2 • ESD protection 2000 volts • Latch-up current 200 mA Logic block diagram A0 A2 A3 A4 A5 A6 A7 I/O0–I/O7 I/O8–I/O15 Pin arrangement VCC Row decoder A1 32K × 16 ...

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