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3 VOLT CMOS SuperSync FIFO™ 32,768 X 18 65,536 X 18 • IDT72V275 IDT72V285 .
EATURES: Choose among the following memory organizations: IDT72V275 32,768 x 18 IDT72V285 65,536 x 18 Pin-compatible with the IDT72V255/72V265 SuperSync FIFOs 10ns read/write cycle time (6.
5ns access time) Fixed, low first word data latency time Auto power down minimizes standby power consumption Master Reset clears entire FIFO Partial Reset clears data, but retains programmable settings Retransmit operation with fixed, low first word data latency time Empty, Full and Half-Full flags signal FIFO status Programmable Almost-Empty and Almost-Full flags, each flag can default to one of two presele...

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