com CY24142 MediaClock™ Multimedia Clock Generator Features • Integrated phase-locked loop (PLL) • Low-jitter, high-accuracy outputs • 3.
3V operation Benefits • Integrated high-performance PLL eliminates the need for — external loop filter components • Meets critical timing requirements in complex system designs • Enables application compatibility Logic Block Diagram XIN XOUT P OSC.
Q Φ VCO OUTPUT MULTIPLEXER AND DIVIDERS CLK1 13.
5 MHz CLK2 54 MHz CLK3 18.
432 MHz CLK4 18.
432 MHz PLL OE1 OE2 VDDL VDD AVDD AVSS VSS VSSL Pin Configuration CY24142 16-pin TSSOP XIN VDD AVDD OE1 AVSS VSSL NC CLK1 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 XOUT CLK4 CLK3 VSS NC VDDL OE2 CLK...

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