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BLV7002
BLV7002 N-channel Enhancement Mode Vertical D-MOS
Transistor Chip
Description N-channel enhancement mode field-effect
transistor
Features
Very fast switching Logic level compatible
Applications
Relay driver High speed line driver Logic level translator.
Size
Chip size: 495µm ×490µm Chip thickness: 220±20µm.
structure
Planar type Electrodes: Aluminum alloy Backside metal: Au alloy
Scribe street width: 50µm Pad size: 90µm x90µm Die per wafer: 25800
ABSOLUTE MAXIMUM RATING
Symbol VDS VGS ID IDM Ptot TSTG Tj
Parameter
Drain – source voltage (DC) Gate – source voltage (DC) Drain current (DC) Peak drain current Total power dissipation Storage temperature Junctio...