NB4N527S 3.
3V, 2.
5Gb/s Dual AnyLevel™ to LVDS Receiver/Driver/Buffer/ Translator with Internal Input Termination NB4N527S is a clock or data Receiver/Driver/Buffer/Translator capable of translating AnyLevelTM input signal (LVPECL, CML, HSTL, LVDS, or LVTTL/LVCMOS) to LVDS.
Depending on the distance, noise immunity of the system design, and transmission line media, this device will receive, drive or translate data or clock signals up to 2.
5 Gb/s or 1.
5 GHz, respectively.
The NB4N527S has a wide input common mode range of GND + 50 mV to VCC − 50 mV combined with two 50 W internal termination resistors is ideal for translating differential or single−ended data or clock signals to 350 mV typica...

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