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3 V 2:1:9 Differential HSTL/PECL/LVDS to HSTL Clock Driver with LVTTL Clock Select and Enable MC100EP809 Description The MC100EP809 is a low skew 2:1:9 differential clock driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer.
The part is designed for use in low voltage applications which require a large number of outputs to drive precisely aligned low skew signals to their destination.
The two clock inputs are one differential HSTL and one differential LVPECL.
Both input pairs can accept LVDS levels.
They are selected by the CLK_SEL pin which is LVTTL.
To avoid generation of a runt clock pulse when the device is enabled/disabled, the Outpu...

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