SDRAM Austin Semiconductor, Inc.
4 Meg x 16 SDRAM Synchronous DRAM Memory FEATURES • • • • • • • • • • • • • com AS4SD4M16 PIN ASSIGNMENT (Top View) 54-Pin TSOP Extended Testing Over -55°C to +125° C and Industrial Temp -40°C to 85° C WRITE Recovery ( tWR/ tDPL) tWR = 2 CLK Fully synchronous; all signals registered on positive edge of system clock Internal pipelined operation; column address can be changed every clock cycle Internal banks for hiding row access/precharge Programmable burst lengths: 1, 2, 4, 8 or full page Auto Precharge and Auto Refresh Modes Self Refresh Mode (Industrial, -40°C to 85° C only) 4,096-cycle refresh LVTTL-compatible inputs and outputs Single +3...

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