White Electronic Designs W3EG7264S-JD3-D3 PRELIMINARY* 512MB – 64Mx72 DDR SDRAM UNBUFFERED FEATURES Double-data-rate architecture DDR200, DDR266, DDR333 and DDR400 • JEDEC design specifications Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read Latency 2,2.
5 (clock) Programmable Burst Length (2,4,8) Programmable Burst type (sequential & interleave) Edge aligned data output, center aligned data input.
Auto and self refresh Serial presence detect Power supply: DDR333, 266, 200: VCC = VCCQ = +2.
5V ± 0.
2V; DDR400: VCC = VCCQ = +2.
6V ± 0.
1V www.
DataSheet4U.
com DESCRIPTION The W3EG7264S is a 64Mx72 Double Data Rate SDRAM memory module based on 512Mb DDR SDRA...

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