com
S T U/D1855P LS
S amHop Microelectronics C orp.
Aug,18 2005
P -C hannel E nhancement Mode Field E ffect
Transistor
P R ODUC T S UMMAR Y
V DS S
-55V
F E AT UR E S
( m W ) Max
ID
-15A
R DS (ON)
S uper high dense cell design for low R DS (ON ).
73 @ V G S = -10V 90 @ V G S = -4.
5V
R ugged and reliable.
TO-252 and TO-251 P ackage.
D
D G S
G D
S
G
S TU S E R IE S TO-252AA(D-P AK)
S TD S E R IE S TO-251(l-P AK)
S
AB S OL UTE MAXIMUM R ATINGS
P arameter Drain-S ource Voltage R ating Drain-S ource Voltage Gate-S ource Voltage Drain C urrent-C ontinuous @ Ta -P ulsed
b a
(T A =25 C unles s otherwis e noted)
S ymbol Vspike d V DS V GS Limit 60 -55 20 -15 -12 -30 -1...