PRELIMINARY CMOS SRAM K6R4008V1B-C/B-L, K6R4008V1B-I/B-P Document Title 512Kx8 Bit High Speed Static RAM(3.
3V Operating).
Operated at Commercial and Industrial Temperature Ranges.
Revision History Rev No.
Rev.
0.
0 Rev.
1.
0 History Initial release with Design Target.
Release to Preliminary Data Sheet.
1.
1.
Replace Design Target to Preliminary.
Release to Final Data Sheet.
2.
1.
Delete Preliminary.
2.
2.
Add 30pF capacitive in test load.
2.
3.
Relax DC characteristics.
Item Previous ICC 10ns 170mA 12ns 160mA 15ns 150mA ISB f=max.
40mA ISB1 f=0 10 / 1mA IDR VDR=3.
0V 0.
9mA Draft Data Jan.
1st, 1997 Jun.
1st, 1997 Remark Design Target Preliminary Rev.
2.
0 Feb.
11th.
1998 Fina...

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