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MPC9100

Part Number MPC9100
Manufacturer Motorola
Description DUAL PLL CLOCK GENERATOR
Published Aug 6, 2008
Detailed Description MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual PLL Clock Generator The MPC9100 is a dual PLL phase locked loop clock gener...
Datasheet MPC9100




Overview
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual PLL Clock Generator The MPC9100 is a dual PLL phase locked loop clock generator.
The device synthesizes a 14.
318 MHz input reference to provide a buffered copy of the input reference, a 31.
3344MHz clock output and a 45.
1584 clock output.
The device features a fully integrated crystal oscillator as the clock reference source.
No external components are required other than the 14.
318 MHz crystal.
The TCLK input is used only for factory test and cannot be used as the PLL clock reference.
To reduce total die area the PLL loop filter capacitors are brought outside the chip.
The FCAP pins are used to connect these capacitors to the internal PLL’s.
0.
01µ...






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