S amHop Microelectronics C orp.
S T U402D
MAY .
03 2006
Dual N-C hannel E nhancement Mode Field E ffect
Transistor
P R ODUC T S UMMAR Y
V DS S
com
F E AT UR E S
( m W ) Max
ID
16A
R DS (ON)
S uper high dense cell design for low R DS (ON ).
30 @ V G S = 10V 40 @ V G S =4.
5V
R ugged and reliable.
TO252-4L package.
D1 D2
40V
D1/D2
S1
G1
S2
TO-252-4L G2
G1 S1 N-ch
G2 S2 N-ch
ABS OLUTE MAXIMUM R ATINGS (T A=25 C unless otherwise noted)
P arameter Drain-S ource Voltage Gate-S ource Voltage Drain C urrent-C ontinuous @ Ta -P ulsed
a
S ymbol V DS V GS 25 C 70 C ID IDM IS Ta= 25 C Ta=70 C PD T J , T S TG
Limit 40 20 16 13.
8 50 8 11 7.
7 -55 to 175
Unit V V A A A A W ...