TH58NVG2S3BTG00 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 2 4 GBIT (512M × 8 BIT) CMOS NAND E PROM DESCRIPTION Lead-Free The TH58NVG2S3B is a single 3.
3 V 4Gbit (4,429,185,024 bits) NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as (2048 + 64) bytes × 64 pages × 4096 blocks.
The device has a 2112-byte static register which allow program and read data to be transferred between the register and the memory cell array in 2112-byte increments.
The Erase operation is implemented in a single block unit (128 Kbytes + 4 Kbytes: 2112 bytes × 64 pages).
The TH58NVG2S3B is a serial-type memory device which utilizes the I/O pins for both a...

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