18Mb Pipelined DDR™II SRAM Burst of 2 Features x x x x x com x x x x Advance Information IDT71P71204 IDT71P71104 IDT71P71804 IDT71P71604 Description The IDT DDRIITM Burst of two SRAMs are high-speed synchronous memories with a double-data-rate (DDR), bidirectional data port.
This scheme allows maximization of the bandwidth on the data bus by passing two data items per clock cycle.
The address bus operates at single data rate speeds, allowing the user to fan out addresses and ease system design while maintaining maximum performance on data transfers.
The DDRII has scalable output impedance on its data output bus and echo clocks, allowing the user to tune the bus for low nois...

Since 2006. D4U Semicon,
Electronic Components Datasheet Search Site. (Privacy Policy & Contact)