December 2004 ® AS7C331MFT32A AS7C331MFT36A 3.
3V 1M × 32/36 Flow-through synchronous SRAM Features • • • • • • • Organization: 1,048,576 words × 32 or 36 bits Fast clock to data access: 7.
5/8.
5/10 ns Fast OE access time: 3.
5/4.
0 ns Fully synchronous flow-through operation Asynchronous output enable control Available in 100-pin TQFP package Individual byte write and global write • • • • • • Multiple chip enables for easy expansion 3.
3V core power supply 2.
5V or 3.
3V I/O operation with separate VDDQ Linear or interleaved burst control Snooze mode for reduced power-standby Common data inputs and data outputs com Logic block diagram LBO CLK ADV ADSC ADSP A[19:0] 20 CLK CE CLR...

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