ADS5272 SBAS324 − JUNE 2004 8-Channel, 12-Bit, 65MSPS ADC with Serial LVDS Interface D Maximum Sample Rate: 65MSPS D 12-Bit Resolution D No Missing Codes com D Power Dissipation: 996mW D CMOS Technology D Simultaneous Sample-and-Hold D 70.
5dB SNR at 10MHz IF D Internal and External References D 3.
3V Digital/Analog Supply D Serialized LVDS Outputs D Integrated Frame and Synch Patterns D MSB and LSB First Modes D Option to Double LVDS Clock Output Currents D Pin- and Format-Compatible Family D TQFP-80 PowerPAD Package FEATURES or LSB first.
The bit coinciding with the rising edge of the 1x clock output is the first bit of the word.
Data is to be latched by the receiver on ...

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