com CMOS Dual-Port RAM SAE 81C80 A CMOS IC Features q q q q q q q q q q q q q q q Processor interface with address and data bus plus signals ALE, WR, RD 8051-, 8096-compatible timing Memory capacity 504 bytes All functions fully static (excl.
oscillator watchdog) Standby operation On-chip oscillator with separate clock output Eight scheduling registers Three loadable timers for processor monitoring or applicable as longterm timers Monitoring of internal oscillator (hardware watchdog) Three outputs for interrupt triggering (can be set on the bus) Fully asynchronous operation of two processors possible Data retention down to 1 V P-LCC-44 (SMD) package Extended temperature r...

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