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S T G 8210
S amHop Microelectronics C orp.
J un,08 2005 ver1.
1
Dual N-C hannel E nhancement Mode Field E ffect
Transistor
P R ODUC T S UMMAR Y
V DS S
20V
F E AT UR E S
( mW ) Max
ID
7A
R DS (ON)
S uper high dense cell design for low R DS (ON ).
20 @ V G S = 4.
0V 28 @ V G S = 2.
5V
R ugged and reliable.
S urface Mount P ackage.
E S D P rotected.
T S S OP
D 1/D 2 S1 S1 G1 1 2 3 4 8 7 6 5 D 1/D 2 S2 S2 G2
D1
D2
G1
G2
(T OP V IE W)
S1
S2
ABS OLUTE MAXIMUM R ATINGS (T A=25 C unless otherwise noted)
P arameter Drain-S ource Voltage Gate-S ource Voltage Drain C urrent-C ontinuous a @ T J =25 C b -P ulsed Drain-S ource Diode Forward C urrent a Maximum P ower Dissi...