Part Number
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M13S32321A |
Manufacturer
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Elite Semiconductor Memory Technology |
Description
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256K x 32 Bit x 4 Banks Double Data Rate SDRAM |
Published
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Sep 17, 2009 |
Detailed Description
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com
ESMT
DDR SDRAM
Features
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M13S32321A
256K x 32 Bit x 4 Banks D...
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Datasheet
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M13S32321A
|
Overview
com
ESMT
DDR SDRAM
Features
z z z z z z z z z z z z z z z z z z z
M13S32321A
256K x 32 Bit x 4 Banks Double Data Rate SDRAM
JEDEC Standard Internal pipelined double-data-rate architecture, two data access per clock cycle Bi-directional data strobe (DQS) On-chip DLL Differential clock inputs (CLK and CLK ) DLL aligns DQ and DQS transition with CLK transition Quad bank operation CAS Latency : 3; 4 Burst Type : Sequential and Interleave Burst Length : 2, 4, 8 All inputs except data & DM are sampled at the rising edge of the system clock(CLK) Data I/O transitions on both edges of data strobe (DQS) DQS is edge-aligned with data for reads; center-aligned with data for WRITE Data...
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