v1.
0 www.
DataSheet4U.
com ProASIC3 Flash Family FPGAs with Optional Soft ARM® Support Features and Benefits High Capacity • 15 k to 1 M System Gates • Up to 144 kbits of True Dual-Port SRAM • Up to 300 User I/Os ® Reprogrammable Flash Technology • • • • 130-nm, 7-Layer Metal (6 Copper), Flash-Based CMOS Process Live at Power-Up (LAPU) Level 0 Support Single-Chip Solution Retains Programmed Design when Powered Off High Performance • 350 MHz System Performance • 3.
3 V, 66 MHz 64-Bit PCI† Clock Conditioning Circuit (CCC) and PLL† • 1.
5 V, 1.
8 V, 2.
5 V, and 3.
3 V Mixed-Voltage Operation • Bank-Selectable I/O Voltages—up to 4 Banks per Chip • Single-Ended I/O Standards: LVTTL, LVCMOS 3.
3 V /...

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