SSTU32864 1.
8 V configurable registered buffer for DDR2 RDIMM applications Rev.
01 — 12 July 2004 com Objective data 1.
Description The SSTU32864 is a 25-bit 1:1 or 14-bit 1:2 configurable registered buffer designed for 1.
7 V to 1.
9 V VDD operation.
All clock and data inputs are compatible with the JEDEC standard to SSTL_18.
The control inputs are LVCMOS.
All outputs are 1.
8 V CMOS drivers that have been optimized to drive the DDR2 DIMM load.
The SSTU32864 operates from a differential clock (CK and CK).
Data are registered at the crossing of CK going HIGH, and CK going LOW.
The C0 input controls the pinout configuration of the 1:2 pinout from A configuration (when LOW) to B co...

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